1. Field of the Invention
The present invention relates to a circuit for controlling a sense amplifier over-driving voltage, and in particular to an improved circuit for controlling a sense amplifier over-driving voltage which is capable of performing an over-driving operation of a normal sense amplifier when a DRAM is operated by a lower voltage.
2. Description of the Background Art
When an internal voltage VDL which is lower than an external power voltage VCC is used as a DRAM is operated by a lower voltage, a speed is decreased in the direction of a high voltage with respect to one of a pair of bit lines. In order to overcome the above-described problem, an over driving method is used, which is directed to operating a sense amplifier at an initial operation stage using an external power voltage VCC and operating the same using an internal voltage VDL after the initial operation stage.
As shown in FIG. 1, the known circuit for controlling a sense amplifier over-driving voltage includes a PMOS transistor PM1 the source of which receives an over-driving voltage VCCCLP, the gate of which receives a sense amplifier driving enable signal SAP1 in accordance with an over-driving voltage, and the source of which is connected with a substrate, an NMOS transistor NM1 the drain of which receives an internal voltage VDL, and the gate of which receives a sense amplifier driving enable signal SAP2 in accordance with the internal voltage, and an NMOS transistor NM2 the source of which is connected with a ground voltage VSS, the gate of which receives a sense amplifier driving enable signal SAN in accordance with a ground voltage VSS, and the drain of which is connected with a low level terminal of the sense amplifier, wherein the drain of the PMOS transistor PM1 and the source of the NMOS transistor NM1 are commonly connected with a high level terminal of the sense amplifier.
The operation of the known circuit of an over-driving voltage control will now be explained with reference to FIGS. 2A through 2D.
At the initial operation stage of the sense amplifier, a driving voltage CSP of the high level terminal of the sense amplifier is used as an over-driving voltage VCCCLP (about 3.3 V). The speed that the bit line BL or bit bar line BLB becomes a high level is controlled to be faster than the speed when the sense amplifier is driven by the internal voltage VDL (about 2.2 V).
If the voltage by which the bit line BL or bit bar line BLB becomes a high level exceeds an internal voltage VDL, the enable signal SAP2 is enabled for driving the sense amplifier by the internal voltage VDL, and the driving voltage CSP of the high level terminal of the sense amplifier is used as an internal voltage VDL.
At this time, if the bit line BL and bit bar line BLB are driven by the voltage exceeding the internal voltage VDL, a predetermined defect occurs in the cell for thereby decreasing the reliability of the product. Therefore, it is necessary to prevent the circuit from being driven by the voltage exceeding the internal voltage during the over-driving operation.
Therefore, since the sense amplifier is driven by the external power voltage VCC, the external power voltage VCC is decreased. In addition, when the over-driving voltage VCCCLP is used as a lower voltage (for example, below 2.2 V), it is impossible to obtain an over-driving effect.